Analysis MOS Memory Circuits – Term Paper Example

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The paper "Analysis MOS Memory Circuits"  is a  remarkable example of a term paper on information technology. MOS memory circuits have become very popular in the recent past as rapid development is witnessed in the field of Information Communication and Technology. They are particularly applied in electronic devices for instance such as computers, radios, digital cameras, and Television sets among others. However, their use in the aforementioned devices varies depending on the purpose of the application. The reason being MOS memory circuits are categorized either as volatile or non-volatile. This classification is based on the capacity for either of the two to maintain and preserve the information contained in them in case of a power surge and of power blackout (Sze, 2001).

In comparing between the two, the information contained in volatile memories is lost as contrasted to non-volatile memories whereby information/data is preserved (Integrated Circuit Engineering Corporation, 1997). In this regard, the first section of this research essay takes a closer look and discusses various kinds of memory circuits that include Volatile memories – NMOS static RAM, CMOS static RAM, and Dynamic RAM Non-Volatile Memories – ROM, PROM, and EPROM. In the second section, class AB amplifiers are described with respect to their output stages for both Bipolar and MOS transistor circuits. Volatile Memories As earlier mentioned, volatile memories do not have the capacity to retain information/data and they, therefore, require to be supplied with power so as to maintain the storage of such information/data.

Majorly there are two types of volatile memories as discussed below. Dynamic Random Access Memory (DRAM) The DRAM is a kind of RAM with a capacity to store every bit of information/data in an isolated capacitor inside the integrated circuit.

DRAM consists of a storage capacitor and a single MOS transistor as illustrated in the figure below. Figure 1. DRAM Cell Based on the fact that capacitors may leak charge, information/data in it is gradually lost unless, periodically, the charge of the capacitor is refreshed. Due to the process of refreshment, it is referred to as dynamic memory in contrast to Static Random Access Memory and other static memories. Nevertheless, DRAM has a lot of benefits due to its simplicity in terms of structure. First, it requires a single capacitor and a transistor for every bit as compared to the six transistors required in SRAM.

As such, this enables DRAM to attain a very high density. Secondly, as opposed to flash memory, DRAM is volatile in that data is lost when the power supply is cut off. Third, the capacitors and transistors used are exceptionally small and several million pieces can be put together in one memory chip (Integrated Circuit Engineering Corporation, 1997). Performance of DRAM In terms of the arrangement, DRAM has a single transistor and a capacitor per cell put in a square array.

This is illustrated in the figure below. Figure 2. DRAM Performance In the above figure, the cells are arranged in a 4x4 array and each row is connected by long lines that are referred to as word lines. In every column, there is a pair of bit lines with each one of them being connected to each storage cell within the column. They are usually referred to as positive and negative bit lines. In the case of a sense amplifier, there are usually two cross-connected inverters in between the bit lines.

This means that the first inverter is usually linked from the positive bit line to the negative bit line whereas the second inverter is linked form the negative bit line to the positive bit line. Such is an illustration of positive feedback but the arrangement is stable only with a single bit-line high as well as a single bit-line low.

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